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New Application Note: 3D IC Metrology Solutions
Let us show you how our metrology solutions can help control and optimize your 3D IC process loop.
The possibility of creating stacked packages using different types of dies (such as memory combined with logic) drives the 2.5 and 3D market and the development of new technologies. Memory stacks represent the first high volume application for a 3D stacked die with TSV (through silicon via) structures. They enhance performance by increasing speed, bandwidth and energy efficiency. TSV processing becomes crucial for the performance and reliability of such devices and thus, an accurate and efficient metrology loop to control and inspect underlying production steps is essential.
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